Xilinx high speed downloader HS3

1. Product introduction:

This design is a high-speed USB-to-JTAG emulator of XILINX, which can download, burn and simulate Xilinx FPGA and CPLD chips, as well as configure PROM and FLASH.

2. Application scenarios:

Using Vivado for XILINX series FPGA development, you can use the debugger to simulate and download the FPGA development board.

3. Product overview:

The device is compatible with all Xilinx development tools, such as iMPACT, Chipscope, EDK, Vitis, Vivado tools. It adopts two-layer PCB design, which perfectly supports the functions of simulation, debugging and firmware programming of XLINIX series FPGA chips, and also adds ESD electrostatic protection function and level conversion function. FT232HQ is used as the main control chip, the USB interface is mini-USB, the USB provides 5V power supply for the board, the EEPROM chip is 93LC56B-I/SN, the connector uses 2*5P, 2.54mm pin header, the download speed can reach up to 30Mb/ S.

3. Product parameters:

For Xilinx FPGA and SOC programming and debugging

Use FT232HQ as master

USB2.0 high-speed mode connection, the maximum speed of JTAG is 30Mb/S.

Vref independent power supply, adaptive voltage range, support wide voltage range 1.65V~5.5V

ESD anti-static

PCB size: 48mm*26mm double-layer board design single-sided layout

Compatible with Vitis, Xilinx ISE® 14.1 and later, Xilinx Vivado® 2013.3 and later

Support chip CPLD, FPGA: Spartan 3E, Spartan 3A, Virtex 4, Virtex 5, Virtex 7, Kintex 7, Artix 7, spartan 7, Virtex UltraScale,, Kintex UltraScale, Virtex UltraScale + , Kintex UltraScale +, ZYNQ, ZYNQ UltraScale +

4. Instructions for use:

1. Product 3D preview:

xilinx high-speed downloader HS3 hardware project Figure 1

2. Level matching:

There are two level matching schemes, choose one of the two:

Plan A: welding u1, u2, u5, u8, not welding R1, R6, R5, R2. Using SN74LVC1T45DRLR level conversion, it can adapt to 1.65-5.5v level, that is, the JTAG interface level of FPGA can be any level between 1.65-5.5V.

Plan B: Do not weld u1, u2, u5, u8, but weld R1, R6, R5, R2. Use 3.3V level to communicate with FPGA. At this time, the level on FPGA side can only be 3.3V.

3. Circuit link

Connect the computer and the emulator with a mini-usb cable. At this time, the blue light of the emulator is on, indicating that the emulator is powered on. At this time, the device manager on the computer side -> Universal Serial Bus Controller -> USB Serial Converter will appear. At this point, it means that it has been successfully connected to the computer. Connect the development board to the emulator through a 2*5P-2.54mm cable, turn on the power of the development board, and the indicator light of the emulator will turn red. At this time, you can open Vivado for program burning and downloading.

Xilinx high-speed downloader HS3 hardware project Figure 2

VIVADO software recognizes the emulator, scans it to the development board, and downloads the program to the development board.

xilinx high-speed downloader HS3 hardware project Figure 3

ILA Simulation via Emulator

xilinx high-speed downloader HS3 hardware project Figure 4

6. Remarks:

1. For the related documents and tools of module program burning, please check in the attachment.

2. The silkscreen of the level conversion chip is "|TAR", and the side marked with "|" is the side where pin 1 is located.

3. If Vivado cannot recognize the module, that is, there is no device in the Vivado->PROGRAM AN DEBUG->open Target->Open New Target->Hardware Target column, please install the plug-in that comes with vivado. The file directory is Vivado\2020.1\data\xicom\cable_drivers\nt64\digilent\install_digilent.exe under the Vivado installation directory.

4. FT232HQ is not easy to buy at present, you can look at the FT232HQ module in a certain treasure.

5. FT232HQ is QFN-48 package, easy to solder, please pay attention when soldering.